Forum Discussion

Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Avalon MM Master BFM

I have followed the ug_avalon verification example test program and modified it with a custom slave. I have removed the slave thread. In the test program, the command is written to a randomly gener...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

You can checkout the example test program here:

There are 3 components connected to BFM master: PIO Control, PIO Status, On-chip RAM

In which the BFM perform read/write to these components in order.

Best Regards,

Richard Tan

Aswinkrishnan's avatar
Aswinkrishnan
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Thank you for this example. I tried changing in the test program.sv but only could manage one component at a time, not successively.

I shared that as a VHD file but I am currently working in verilog. I will look in to your example and understand, in the meantime, if there is an example written in verilog, it would be helpful.

Regards

Aswin