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gomezramones's avatar
gomezramones
Icon for New Contributor rankNew Contributor
3 years ago

Avalon I2C (Master) Intel FPGA IP

Hi, I am trying to use Avalon I2C (Master) Intel FPGA IP in Qsys but I am not sure how to use the register in this module since there are Control Register to configure the speed or enable the core. I...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi


To interface with the IP, you could include the library and interface with the IP with the following function calls.

https://www.intel.com/content/www/us/en/docs/programmable/683130/22-1/fpga-i2c-host-core-api.html


You could refer to the link below on the pin definition.

https://www.intel.com/content/www/us/en/docs/programmable/683130/22-1/interface-13852.html


There are more information of the IP in the link below:

https://www.intel.com/content/www/us/en/docs/programmable/683130/22-1/fpga-i2c-host-core.html


Regards

Jingyang, Teh