Asynchronous reset and synchronizers

Thats pretty much how Ive seen it done in several altera projects. I think you can leave the false path out, as the tool should be analysing for recovery and removal violations on rst_n, as it should see that rst_n is a synchronised async reset (basically similar to setup and hold violations for registers).

If the fanout of rst_n gets large, you may need to force it into a ALTCLKCTRL to ensure it's on a global net, but bare in mind there are not many of these so with lots of clocks in the design these may be limited.