asynchronous input to flip flop clock

Thanks for the responses. I saw the signals in the Unconstrained Paths in TimeQuest. I didn't want to declare them as clocks since they weren't. I also tried adding a the clock to the flip flop with a clock enable and the old clocking signal to an asynchronous load. I then grounded the clock enable so that it would never load on the clock signal. In the RTL viewer the output of the register is just going to ALOAD but TimeQuest and Quartus are still calling it a clock. I'll try using create_generated_clock to the register.

The person I'm working with wants to store a count value every time a certain event happens so that the count value can be read out externally. I'm supposed checking the timing on his design for him and learning TimeQuest but he's using a bunch of latches in his design. Everything I read says latches are bad for timing and I try to tell him but he doesn't listen and I don't know verlog well enough to show him a better way. Am I crazy or should he be using registers instead of latches?