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Altera_Forum
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13 years ago

Arria V Transceiver Clocking

hello Folks, I am attempting to make use of 6 multi gigabit transceivers in a design. Four of these transceivers will be bonded and will operate at 1250 Mb/s. The remaining two tran...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I have the same question. I generate the transceivers with the Custom Phy IP Core. There is always CMU PLL selected. No way to select extern/fractional PLL.