Arria V hold time violations

Strange. It's possible to have large hold because the global is a large H tree, so you could have two nodes next to each other, but they may be at very different paths fed by the clock tree. The router can add delay to a path to meet hold violations and this is normally not a problem, but in your case a dedicated path between the DSPs is being used so there is no way for the router to add delay. I have never seen this problem(and have seen a million ways to have hold violations), so am surprised this hasn't come up before. I wonder if it occurs at the Y# -> Y# location that it occurs at, but it would be difficult to avoid DSP chains from crossing this point. (Arria V has a number of high-DSP designs, so again, I am surprised this hasn't been seen before and i feel like I'm missing something.)