Arria II GX PCIe TLP payload issue

I am using Arria II GX FPGA in my PCIe cards and PCIe Hard IP with Avalon Streaming interface. I am using Quartus 9.1 SP1. I have configured the PCIe core to have a maximum TLP payload of 256 bytes(I was able to assign 512 bytes with Quartus SP2). My issues are:

1. With Quartus 9.0 SP2, I can assign the TLP payload to be 512 bytes and I was able to read and write from memory(DMA) with 512 TLP payload size packets. When I moved to 9.1 it stopped working and when I opened the PCIe core with 9.1, it had an option for only 128 and 256 bytes for TLP packet size. But the Arria II GX data sheet claims that it can do 512 bytes TLP packets. Is this an issue or am I missing something in my settings?

2. With 9.1 I initialized the PCIe core to accept 256 bytes payload and I could only do DMA read and write of 128 bytes TLP packets. If I use a TLP packet of 256 bytes, the tx_st_ready(transmit avalon streaming interface ready) signal goes low and never goes high again. When this happens, I see that the posted data credit goes to zero in tx_cred0 port. But, I do check in my DMA engine for the credits before I initiate a TLP packet, so I guess I am not flooding the system with TLP packets.

Can someone please help me with these issues?

Thanks,

Kumaran