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cconger
New Contributor
New ContributorArria 10 GX PLL not producing correct phase shift
I have generated an Altera PLL using Quartus Prime Standard Edition 17.1. The PLL accepts a 50 MHz reference clock, and produces five output clocks: 50 MHz, 200 MHz, 200 MHz w/ 1250ps shift, 333 MH...
ccongerNew Contributor
New ContributorHi JwChin, thanks for the help! I checked the fitter report (relevant section attached here as well), and the fitter report shows the correct settings. So far other than the simulation, everything seems OK. I'm just very curious about what is happening in simulation.
