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Altera_Forum's avatar
Altera_Forum
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7 years ago

Arria 10 GX OpenCL setup question

I have an Arria 10 GX development kit that I am trying to set up for OpenCL. Thus far I have been able to program the board with the initial configuration for the MAX V and the Arria 10, but I have been unable to flash the boardtest design to the board with aocl flash. It outputs the help text for aocl flash even though the arguments are correct, and occasionally it will show that a syntax error occurred in a script that it runs, like this: 

sh: 1: Syntax error: "(" unexpected
I have been following this guide (https://www.altera.com/documentation/tgy1490191698959.html#pbl1490212978961) and running the command as described: 

aocl flash acl0 boardtest.aocx

Has anyone else experienced this? I have also been able to compile the driver with no problem but I cannot use it without a default configuration flashed to the board.

Thanks in advance for your help!

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    Are you possibly copy/pasting commands from a PDF that could potentially insert invalid characters into the command line?

  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    Bump? I have done an OpenCL setup on another board before without encountering this issue, so I'm not sure where to start with this issue.

  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    --- Quote Start ---

    It outputs the help text for aocl flash even though the arguments are correct

    --- Quote End ---

    I encountered such a case a few days ago when trying to move from Quartus v16.1 to v17.1. In the end I realized that the PCI-E driver must be first updated to the new version using "aocl install", before the FPGA can be updated with a new binary. Have you correctly installed/updated the driver for your board?
  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    --- Quote Start ---

    In the end I realized that the PCI-E driver must be first updated to the new version using "aocl install", before the FPGA can be updated with a new binary.

    --- Quote End ---

    I had tried this as well, but i did not have any success. The driver installed without a problem and I can see it in the module list with lsmod, but it did not affect the usage of aocl flash.

    --- Quote Start ---

    It could also be that your shell scripts are being interpreted with dash instead of bash when using /bin/sh.

    --- Quote End ---

    I had not tried this yet, so I modified the Intel-supplied flash script that I believe aocl flash executes (located at $AOCL_BOARD_PACKAGE_ROOT/linux64/libexec/flash) to use bash instead of sh, but that did not work either.

    I did also notice that the it seems like the change to the flash script may not have been the right file because I still get the same "sh: 1: Syntax error: "(" unexpected" error occasionally, it would be bash throwing the error if I had changed the correct file.
  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    I'm seeing the same issue as well. Any chance that you have solved this?

  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    I haven't solved this yet. I checked my DIP switches on the board and one set was set incorrectly (the ones on the heatsink side of the board) but correctly setting them did not change the outcome. I still don't see any evidence of an acl0 device being created as a result of the driver being inserted, and even creating the device manually with mknod returned no useful result.

    If anyone else has any useful information on this, please share it here. If other people are having similar issues, there must be something that none of us have tried yet.
  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    May not be relevant,

    the problem I had with this step is that the guide failed to mention you have to set the jtag speed to 6M again after the reboot.
  • Altera_Forum's avatar
    Altera_Forum
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    7 years ago

    --- Quote Start ---

    May not be relevant,

    the problem I had with this step is that the guide failed to mention you have to set the jtag speed to 6M again after the reboot.

    --- Quote End ---

    It could be relevant, but i did try this with no success. Still just the help text.

    I did find out that it is possible for the initial programming of the device with the top.sof binary included in the board bringup package requires a soft reboot, which my system failed to do without interaction. It seemed like the system was not expecting a device to be discovered on PCIe bus after the board was programmed. A hard reboot allowed it to boot, but that appears to be contrary to the guide and there is no device file for it in /dev/. I am investigating this, I will report back with anything I find.