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niceflower's avatar
niceflower
Icon for New Contributor rankNew Contributor
2 years ago

Arria 10 FPGA Fitter error 14566

The chip used is 10ax115RF40, and two instances of DDR4 are instantiated, using four banks: 2L, 2K, 3H, and 3G. I used the 2L and 2K DDR4 Fitter successfully, but another DDR4 with 3H and 3G had the ...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi,

I have checked the IO Bank 3G that has 47 pins. The pins at index 1-11 are not able to be used for DQ/DQS signal.

Then the second EMIF interface need to disable ECC so that the DQ width can set to 32 to fit into this IO bank.

If you cannot do so, you may choose another IO Bank such IO Bank 2A and 2F.

I have attached your design that can be fitted in IO Bank 3G and 3H. But the DQ width is set to 32.

Regards,

Adzim