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MathiasB's avatar
MathiasB
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4 years ago
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Arria 10: Connect TSE IP to RGMII PHY

Hello all,

I am working on a board embedding a Arria 10 SX SoC, connected to an Ethernet PHY.

I would like to use the Triple Speed Ethernet (TSE) IP with this PHY. However, its interface is RGMII and I have found that Arria 10 does not allow RGMII <-> TSE connection (from Intel KDB: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/ip/2017/does-the-triple-speed-ethernet-ip-core-support-rgmii-mode-in-a10.html)

Is there a known solution to circumvent this problem? Whether it is by instantiating a bridge IP, replacing the TSE by something else or using the HPS as some kind of bridge?

Thank you!

  • Deshi_Intel's avatar
    Deshi_Intel
    4 years ago

    HI,


    Unfortunately this is Arria 10 device architecture limitation when interacting with RGMII PHY interface.


    The limitation is on the data transfer path between FPGA IO circuitry block to FPGA core logic (where soft IP solution is located like TSE)


    Therefore, Unfortunately there is no solution for it.


    Thanks for your understanding


    Regards,

    dlim


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