Arrays - detect signal changes and simulate in Modelsim

1. No. The only portable and version control friendly method is with HDL (VHDL or (System)Verilog). BDF files only work in Quartus, so if you need to port your design to Xilinx or some other tool, you'll have to convert it to VHDL anyway. Mentor do have a tool called HDL designer that tries to keep as much HDL as it can, but its not free and its very much a love it or hate it tool (most engineers I know hate it, because again, its another tool you'll need a licence for). At the end of the day, HDL can be edited with windows notepad. BDF/other graphical tools cant.