Yes, s_dataout, and s_data in are the same as datain and dataout (that was a typo). The value s_datain(1) is of type std_logic_vector(11 downto 0), the value s_dataout(1) is of type std_logic_vector(11 downto 0);
s_datain = [12'b sample1, 12'b sample2, 12'b sample3, 12'b sample4, 12'b sample5, 12'b sample6, 12'b sample7, 12'b sample8, 12'b sample9]
s_dataout = (1)[sample1, sample2, sample3, sample4, sample5, sample6, sample7]
s_dataout = (2)[sample3, sample4, sample5, sample6, sample7, sample8, sample9]
The index DOES work if I declare, signal dataout : arr11, then when I choose s_datain(1 to 7) it is put in s_dataout(1 to 7) correctly, but I have 8,9 which I don't need. All I'm trying to do is take a slice of samples from a 1D array and put it in a smaller 2D array.