Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou can create an indexed type
type key_t is array (0 to 3) of std_logic_vector(31 downto 0); signal k : key_t; and then in your code, you can take advantage of loops too process(key) begin for i in 0 to 3 loop k(i) <= key(32*(i+1)-1 downto 32*i); end loop; end process; Cheers, Dave