You are including too many libraries. Those two are in direct conflict:
USE ieee.std_logic_signed;
USE ieee.std_logic_unsigned;
The first one says you will want to do arithmetic directly on std_logic_vectors, using them as signed values, while the other one says you will use them as unsigned values. But both are non standard, so you should better remove them entirely.
Then, as the error message suggests, both those libraries
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.numeric_std.ALL;
define a SIGNED type, so you should keep only one of them. I recommend to keep ieee.numeric_std.all, which is the only standard one.
So as a result, use only those libraries in your code:
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.MATH_REAL.ALL;
USE IEEE.numeric_std.ALL;
And then fix the remaining errors that you get, mostly with the CONV functions that aren't defined any more. You can use the SIGNED type instead, and use the to_integer and to_signed functions for conversions.
Are you writing this just for simulating, or also to synthesize and put in an FPGA? The functions from MATH_REAL and the real types can't be synthesized.