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Altera_Forum
Honored Contributor
8 years agoAn issue about compiling the OpenCL to FPGA
Hi, I met an issue about compiling the OpenCL HelloWorld/Vector_add code to FPGA. Quartus Prime can offload the VHDL code into the FPGA board but the OpenCL SDK and compiler can not progra...
Altera_Forum
Honored Contributor
8 years agoThe driver includes board-specific PCI-E timing. You MUST use the driver provided by Terasic. I urge you to read and follow the steps mentioned in Terasic's "OpenCL User Manual" for that board.