Altpll using output frequency

Dear,

Thx for the effort, I think i worked it out.

You can use clkx_output_frequency parameter IF you define the multiply and devision factors in the SDC file. Make a clock and derived clock for the pll clocks.

It seems that one needs either way to supply Quartus with multiply and devision factors. So i have to agree with kaz and calculated myself the mult and div factors. This is not so easy as it seams because their are a lot of restricions eg. Fvco max/min, m max, n max, c max,.... And it is frustrating because i know Quartus CAN do it (it does it in the megawizard GUI!). Not very convenient for the user :-(

Anyhow: if their are more tips to tackle this problem in an elegant way just add them to this tread! I will be gratefull.

Have a nice old to new!

Johannes