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Altera_Forum's avatar
Altera_Forum
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17 years ago

ALTPLL in Mega Wizard

Hi,

I generated a PLL using Mega Wizard. It creates a clock with 50MHz and 5% duty cycle. I need to increase the duty cycle from the top level entity using a loop.

In the PLL code duty cycle is defined under Generics as a type - NATURAL.

How can I pass value from top level entity to PLL code.

(The only way I know is to define a signal and pass it - it didn't work due to type variation):confused:

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    Generics are constant parameters, they can't be connected to signals. Furthermore, a PLL's frequency or duty cycle isn't easily variable at runtime, only possible through PLL reconfiguration. Read the respective device manual for hardware features available with your FPGA family.