altpll function

Re: FvM

I tried placing the clock input at HSTCA PIN AE31 and it still gives the same error :

Error: Can't place input clock pin clock driving fast PLL alt_pll:comb_4|altpll:altpll_component|alt_pll_altpll:auto_generated|pll1 in non-compensated I/O location AE31 -- fast PLL drives at least one non-DPA-mode SERDES

Moreover I cannot use the RX/TX ports of ank 2 and 3 of HSTC as LVDS. It gives either of the following errors:

Error: Can't place differential I/O receiver pin inp in location C26 -- differential I/O pin requires dedicated I/O SERDES, but location does not have differential I/O receiver SERDES available

Error: PIN xxx does not support LVDS