Altera Monitor Program compile errors

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The time_limit in the sof file name means that you don't have the licenses for every IP block you use in the design. I assume that it is the Nios processor.

You are therefore in Opencore tethered evaluation mode, and it is important to:

- keep the USB blaster connected to your board

- keep the Opencore alert window open. I don't remember the exact text on the window, but basically it opens just after you configure the board, and says that you are evaluating Opencore plus IPs. do not click on "cancel"! Just run the IDE and dowload the software. If you click on cancel, it will stop all the demo IPs in the FPGA and this could explain your error message.

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Hi, Daixiwen,

Thanks very much for the information. now i can successfully load the lights.c into the board, then I clicked the "action-->continue", however, the LEDs didn't react at all! The program is as follows:

# define switches (volatile char *) 0x0001800# define leds (char *) 0x0001810

void main()

{ while (1)

*leds = *switches;

}

The c program is supposed to control the corresponding LEDs... Seems the loading was free of any errors, what could the problem be?

Thanks