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Altera_Forum
Honored Contributor
18 years agoThanks for the responses,
The way that I have been trying to implement up to this point is the following. For each component of the ring oscillator (i.e. 4 buffers 1 inverter) I implement by making use of the LUT_input/LUT_output primitives. This is an example of a buffer, note pre_toggle_1 is simply the reset passed and pre_toggle is the ring_invert signal, the signal that wraps around from the end of the ring oscillator. -------------------------------------------------------- delay1_lut_in_1: LUT_INPUT PORT map( a_in => reset, a_out=> pre_toggle_1 ); delay1_lut_in_2: LUT_INPUT PORT map( a_in => ring_invert, a_out=> pre_toggle ); pre_toggle_2 <= (pre_toggle_1) AND (pre_toggle); delay1_lut_out: LUT_OUTPUT Port map( a_in => pre_toggle_2, a_out => ring_delay1 ); ----------------------------------------------------------------------- I then tried mapping all 3 elements to a particular location on the chip by use of the assignment editor. -to (these names were found by using the node finder) |lcd_test|ring_osc:\GEN_RO:0:XILINX_RO|delay1_lut_in_1 |lcd_test|ring_osc:\GEN_RO:0:XILINX_RO|delay1_lut_in_2 |lcd_test|ring_osc:\GEN_RO:0:XILINX_RO|delay1_lut_out -assignment name LOCATION as well as Implement as output of logic cell -value LCCOMB_X14_Y35_N0 -------------------------------------------------------------------------------------- The following components of the ring oscillator are then mapped to sequential cells, so 1 particular ring oscillator could have the locations all within the same LAB: LCCOMB_X14_Y35_N0 - buffer LCCOMB_X14_Y35_N2 - buffer LCCOMB_X14_Y35_N4 - buffer LCCOMB_X14_Y35_N6 - buffer LCCOMB_X14_Y35_N8 - inverter ----------------------------------------------------------------------- Additionally I tried using the attribute keep statements attribute KEEP : string; attribute KEEP of pre_toggle : signal is "true"; attribute KEEP of pre_toggle_1 : signal is "true"; attribute KEEP of ring_delay1 : signal is "true"; --------------------------------------------------------------------------- Do I need to use an LCELL to implement the functions and not LUT_input/LUT_output? Also do you guys know of a way that I can verify that the placements are actually still there after synthesis. At this point it compiles without error, but with that warning. Is there a way that I can see that the placements have been respected? Thank you for your help. Paul