AHDL - VCC to dff.d

Hello,

it was very difficult to find a proper thread title. I hope somebody felt addressed by it . . .

I have an old project I have to maintain. Some of the code is in AHDL that I try ti understand.

The code instantiates a dff called valid_signal.

Also there is a state machine which is checking certain other signals. If everything is fine then the code in states 13 to 15 is as follows:

WHEN s13 => IF !in.q THEN	
				valid_signal.d = VCC;
				rx_sm = s14;
			  END IF;
			  rx_sm = s0;
  WHEN s14 => valid_signal.d = VCC;
			  rx_sm = s15;
  WHEN s15 => valid_signal.d = VCC;
			  rx_sm = s0;

The question is how and when this VCC will be removed from the input of the valid_signal dff. I mean in my code there is no line like this: valid_signal.d = GND.

To me it looks like that once the VCC is applied to the dff it will stay there forever because no other signal value is applied.

Is there something like an unspoken rule that if nothing is applied to the dff in AHDL then the state of the input is GND or '0'?

If so then this would mean that at state s0 where nothing is applied to the input of valid_signal it will be GND?

Please help me with this as it is very hard to find proper documentation about AHDL these days.

Thanks,

Maik