Agilex 7 HPS how to read from port B of 2-port RAM

Hi sstrell,

Thanks for coming back to me.

I did not connect individual signals.

Below shows my connection between my HPS' h2f_axi_master and on-chip memory II's s2. There is no problem with it.

The problem comes when you write the code.

If you open up the on-chip memory II, you will see these signals,

When you do the coding and if you want to, say read, you need to provide read2 signal with a high signal and also you byteenable2 signanls with high (depending which byte you want to read) before you can, actually, read.

read2 <= '1';

byteenable <= "1111"; -- assuming I wan to read all the 4 bytes

address2 <= "00 0000 0000 0000 1111"; -- assuming I want to read address 0x000F

readbuff <= readdata2; -- assuming readbuff is declared as signal readbuff : std_logic_vector (31 downto 0)

As you can see here, byteenable and read2 needs to be controlled by some pins at HPS's side.

So, which pins of HPS are controlling these byteenable and read2?

Regards