Forum Discussion
Altera_Forum
Honored Contributor
13 years agoThe main problem is that you have included std_logic_arith AND numeric_std. They conflict with each other, so you need to remove std_logic_arith (its not standard VHDL. Neither is std_logic_unsigned, but Ill let you keep that)
the answer would then be: opixel(23 downto 16) <= std_logic_vector( unsigned( ipixel(23 downto 16) ) + 9 );