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Altera_Forum
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11 years ago

Adding a library to Quartus II 14 (web) and ModelSim ASE

All:

I'm running Quartus II 14 Web Edition and ModelSim 10.1E (Windows 8.1); both installed without issue and I have been successfully using both.

I spent many hours yesterday and today googling, checking this forum, and reading the Mentor Graphics ModelSim Reference Manual (10.1E), trying to learn the steps needed to add new libraries. I've seen pieces of the puzzle supplied, but haven't seen anything similar to a full answer.

Ok, so here is what I'm trying to do: as a test, I want to add standard_additions.vhd to the list of available libraries. (Later, I envision adding my own parts library/libraries as I gain experience and develop my own parts.)

Here is what I think I've learned:

1. Any library added (at least to ModelSim) must be compiled.

2. The basic workflow is: vlib (create/initialize the library storage locations); vcom (compile the library source into the storage created by vlib).

3. I think there is a refresh/update step, but I'm unclear on exactly how this is done.

My first attempts at this were "not very good" :( (I haven't figured out how to make ModelSim (for example) "get out of" the work location into a global location.)

I've examined the directory structures of

... /altera/14.0/modelsime_ase/vhdl_src ..., etc.

... /altera/14.0/quartus/library ..., etc.

and think that I understand the src and compiled locations of the libraries in ModelSim, and the source-only locations (I think) in quartus.

The questions that remain are:

1. Is there a step-by-step tutorial that someone can recommend? So far, finding one has eluded me!

2. Even if I am finally able to successfully add a library to Quartus, how do I ensure that it is compatible with ModelSim (and vice-versa)? I'm assuming I'll use the same source for both, but what is "best practice" here?

Thanks much!

Dave

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  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Dave:

    Since posting, I've been continuing experiments with ModelSim and its corresponding tutorial PDF. I have to say that I'm beginning to understand your fondness for TCL scripts...

    --- Quote Start ---

    Since "work" is a library in its own right (the default VHDL library), you might want to use $myroot\vhdllibs\standard_additions instead (to avoid confusion).

    --- Quote End ---

    Thank you for that clarification. The directory structure seemed to be deeper than it needed to be; your reply confirmed that.

    --- Quote Start ---

    As for NativeLink, I never use it. I use a Quartus Tcl script for synthesis and a Modelsim Tcl script for simulation.

    --- Quote End ---

    As a newb, I had planned to put off the use of TCL as a regular part of my "initial" workflow. However, after your note here, and my continuing experiments with how to set up reusable objects, I'm convinced that I'll not only will I not lose time, I'll save time - even this early in my learning curve.

    So, I think it is finally time to retire this thread.

    Once again, thank you for all your help!

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Just to add one thing. If this is all going into a version control system, all you want to check in is the source code and the TCL files that recreate all the libraries. Putting generated files into svn or whatever is often a recipe for disaster.

    We run many fpgas running to hundreds of source files. There is a complicated tcl setup to drive compilation and simulation from a fresh svn checkout.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Tricky,

    Yes, have used source control for many years, so I'm very familiar with the issue you mention (and have used SVN for the last 5 years). Between you and Dave, I've received some great advice and insight into what to expect (and not!), particularly from Quartus. I'll be coding some TCL scripts in the next day or two to get my reusable workflow supported. And, as you know, it will be simple to test by simply getting from SVN into a temp location, then attempting a full run thru the script.

    I should have gotten back into FPGAs years ago! This is more fun than I've had in a long time...

    Thanks!

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hey Dave,

    Check out the synthesis projects in these threads;

    SDRAM on DE0-nano board (post# 2 zip):

    http://www.alteraforum.com/forum/showthread.php?t=45927

    BeMicro CV - Qsys starter project? (post# 5 zip)

    http://www.alteraforum.com/forum/showthread.php?t=43992

    Look at the scripts/ folder, specifically constraints.tcl, synth.tcl, and the support scripts.

    These scripts and the source layout has been simplified to make it easier for anyone to simply run the script without having to setup a build environment. Normally I'll keep common code in a single folder, eg., the pin assignments constraints.tcl file normally lives in a <board>/share/scripts folder.

    The DE0-nano design contains a new scripting concept that I've been playing with. Altera saves its Qsys systems in XML, but that XML is not portable across multiple versions of Quartus. I show how to convert the XML to Tcl and then edit the Tcl to support multiple versions of Quartus. Much nicer to check into version control, since it then works for anyone who checks it out :)

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Dave:

    I partially beat you to it - I was reviewing your DE0 nano basic ZIP when the notice of your reply arrived (because I remember that it had a synth script). I'll review the SDRAM scripts now, along with the BeMicro. (My design will actually use the PLL and interface to SDRAM, so the former should be exceptionally useful.)

    I don't know yet about the Qsys/XML stuff you mention. Since it's only me, I don't have the concern of having to share engineering either way.

    Again, thanks! (If you teach FPGA out there at CalTech, I'd love to sit in on one of your classes - next time I'm one the west coast!)

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    --- Quote Start ---

    Since it's only me, I don't have the concern of having to share engineering either way.

    --- Quote End ---

    You forget that after 6 months, the new you does not remember the old you, so you are always having to "share", even if its with yourself :)

    --- Quote Start ---

    Again, thanks! (If you teach FPGA out there at CalTech, I'd love to sit in on one of your classes - next time I'm one the west coast!)

    --- Quote End ---

    Alas, I do not live on campus, I live in the middle of nowhere (near the radio telescopes), not far from Yosemite. I do teach a DSP class at the Embedded Systems Conference, so that I get to civilization at least once a year, you can check out the notes here;

    http://www.ovro.caltech.edu/~dwh/correlator/cobra_docs.html

    The EE-Live 2014 slides have the latest talk. Last years ESC-104 talk has a paper and code with DSP examples for the DE0-nano.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Dave:

    Here's a bit of trivia for you: did you know that the OVRO site doesn't show on google maps, but does show on mapquest. (OVRO is your site, correct?)
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    --- Quote Start ---

    Here's a bit of trivia for you: did you know that the OVRO site doesn't show on google maps, but does show on mapquest. (OVRO is your site, correct?)

    --- Quote End ---

    Ha! I told you I was in the middle of nowhere! :)