Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorAdd vhdl records as pin-assignments
Is it possible to create a design which his input/output ports are VHDL records and to make synthesizable and programmable? Let's say I have a package I wrote and in it I define a record type: ...
Altera_ForumHonored Contributor
Honored Contributor1. Records and schematics don't mix. So no.
2. I think it will work, but usually it's recommended to stick to non record types at the top level, and types that all map to bits (so no integers). But records internally is a good idea.
