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There is also one Verilog example within the CD of daughter card:
module DE2_115_ADDA ...
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Don't post code inline in messages. It just clutters the forum. There is a "Manage Attachments" button that can be used to add code.
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For first step i am planning to take the signal from AD converter and display corresponding output into red led like this:
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Your first step should be to connect the clock and data to the GPIO and use SignalTap to capture a trace of data. SignalTap is an FPGA logic analyzer. Using that interface, you will be able to see what outputs from the DAC do when you control inputs.
Actually, your first step should be to run a Terasic example design. I am sure they must have one. If you cannot find one, contact them and ask for one.
Cheers,
Dave
Honored Contributor
