A/D converter-FPGA-USB

There is also one Verilog example within the CD of daughter card:

module DE2_115_ADDA(

//////// CLOCK //////////

CLOCK_50,

CLOCK2_50,

CLOCK3_50,

//////// I2C for HSMC //////////

I2C_SCLK,

I2C_SDAT,

//////// HSMC //////////

ADC_CLK_A,

ADC_CLK_B,

ADC_DA,

ADC_DB,

ADC_OEB_A,

ADC_OEB_B,

ADC_OTR_A,

ADC_OTR_B,

DAC_CLK_A,

DAC_CLK_B,

DAC_DA,

DAC_DB,

DAC_MODE,

DAC_WRT_A,

DAC_WRT_B,

OSC_SMA_ADC4,

SMA_DAC4

);

//=======================================================

// PORT declarations

//=======================================================

//////////// CLOCK //////////

input CLOCK_50;

input CLOCK2_50;

input CLOCK3_50;

//////////// I2C for HSMC //////////

output I2C_SCLK;

inout I2C_SDAT;

//////////// HSMC //////////

output ADC_CLK_A;

output ADC_CLK_B;

input [13:0] ADC_DA;

input [13:0] ADC_DB;

output ADC_OEB_A;

output ADC_OEB_B;

input ADC_OTR_A;

input ADC_OTR_B;

output DAC_CLK_A;

output DAC_CLK_B;

output [13:0] DAC_DA;

output [13:0] DAC_DB;

output DAC_MODE;

output DAC_WRT_A;

output DAC_WRT_B;

input OSC_SMA_ADC4;

input SMA_DAC4;

I was not able to add complete code due to following errors: You have included 7 images in your message. You are limited to using 4 images so please go back and correct the problem and then continue again.

As I am going to use only one channel out of 4(ADC_DA) for my purpose(Analog to digital conversion), I will map the 14 bit data pins of FPGA with this one. but I am not sure about which other pins like clock, OTR,OEB, etc will be needed for my purpose.

For first step i am planning to take the signal from AD converter and display corresponding output into red led like this:

library ieee;

use ieee.std_logic_1164.all;

ENTITY part1 IS

PORT ( ADC_DA : IN STD_LOGIC_VECTOR(13 DOWNTO 0);

LEDR : OUT STD_LOGIC_VECTOR(13 DOWNTO 0)

);

END part1;

ARCHITECTURE Behavior OF part1 IS

BEGIN

LEDR <= ADC_DA;

END Behavior;

can anybody make me clear.