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Altera_Forum
Honored Contributor
10 years agoAbout VGA Output
Hello, I am working for the first time with FPGA (cyclone v soc) and i am trying to get a output from VGA Port on the monitor. I have set the resolution for 1024x768 and PLL input frequency as ...
Altera_Forum
Honored Contributor
10 years agopnayak15 -
What is driving the monitor? Is the FPGA output going to a DVI or HDMI transmitter? If so, what is driving the DE input to the transmitter? I can't see your simulation waveforms because your JPEGs are too small, but from your VHDL code it looks like the PLL is held in reset. Are you sure your clocking is ok? Can you probe your clock on the board to verify?