Forum Discussion
About the concept of "set_output_delay constraint"
- 3 years ago
When you mention 2), I believe this is the question you are referring to:
"2) Depending on the values of tsu_ext and th_ext, the result of the formula may be "output delay max < output delay min", but does that mean there is no problem?"
Yes, it is possible for the setting value of set_output_delay -min to be larger than the setting value of set_output_delay -max depending on the setup/hold time of the downstream device/ external circuit.
If the downstream device has a shorter setup time requirement, then the set_output_delay -min value can be larger than the set_output_delay -max value. This is because a larger delay would be needed to ensure that the output signal meets the shorter setup time requirement.
Conversely, if the downstream device has a shorter hold time requirement, then the set_output_delay -max value can be larger than the set_output_delay -min value. This is because a smaller delay would be needed to ensure that the output signal meets the shorter hold time requirement.
In summary, the setting values of set_output_delay -min and -max can vary depending on the timing requirements of the downstream device. It is important to carefully analyze the timing requirements of the entire system to determine appropriate delay values for each constraint.
Hope that helps to clarify. : )
Best Regards,
Richard Tan
If so, does it mean that correct analysis results can be obtained if the startup clock is specified even if the virtual clock is not specified?
- No, even if the startup clock is mentioned, accurate analysis findings cannot be acquired if the virtual clock is not stated. The virtual clock, which is usually the quickest clock in the system, serves as the reference clock for timing analysis.
The Timing Analyzer cannot precisely determine the timing routes and violations in the architecture without knowing the virtual clock. To carry out a precise timing analysis, it is crucial to specify both the starting clock and virtual clock.