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Occasional ContributorAbout SignalTap
In most cases, you choose a clock that is in the same clock domain with the signal that you are looking at. But there is no requirement for that. Sometimes you might use a faster clock domain for a slower signal, to get a higher sampling rate.
You can use the fastest clock available to get the best results.
Refer to the Timing Analysis section of the Compilation Report for the maximum frequency of the logic analyzer clock.
Super ContributorIn most cases, you choose a clock that is in the same clock domain with the signal that you are looking at. But there is no requirement for that. Sometimes you might use a faster clock domain for a slower signal, to get a higher sampling rate.
You can use the fastest clock available to get the best results.
Refer to the Timing Analysis section of the Compilation Report for the maximum frequency of the logic analyzer clock.
Yamada1Thank you for answering.
I didn't realize about the maximum frequency of the logic analyzer clock. Thank you for your advice.
I understand that depending on the design of the signal tap, the clock to be used may interrupt the maximum frequency.
