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AAlas3's avatar
AAlas3
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

A comment causes compilation error !

Hey guys,

I am doing a project and I found out that this comment caused a compilation error! I just don't know why

comment : /*/\/\/\/\/\/\/\/\/\/\*/

could anyone please tell me why ?

4 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    6 years ago

    What does the error say? Perhaps the first * is being interpreted as the start and end of the comment.

    #iwork4intel

  • AAlas3's avatar
    AAlas3
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    it says:

    "Object(the name of the signal) is not declared, Verify the object name is correct. If the name is correct, declare the object."

    for all regs and wires inside the Verilog code

  • Vicky1's avatar
    Vicky1
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    Could you please check with Verilog-2001 version? older version of verilog might not supported.

    'Assignments' Menu-> 'Settings'.

    Regards,

    Vicky

  • AAlas3's avatar
    AAlas3
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Yes it is Verilog 2001, I think this happened because of the escaping mechanism in Verilog (\ " ")