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Altera_Forum's avatar
Altera_Forum
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10 years ago

7segments verilog erorrs

hi, I'm trying to create a verilog file for 2 digit 7 segments, I've created the truth table and derive the equation using kmap but I faced a errors when analyse&synthesis :( the code is : ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I'm sorry but what is (LUT for each segment) I'm kinda new to quartus and all of its things, so can explain more, please

about the errors I found that they involved with other files error --->> can't I analyse&synthesis for each file alone ???

and what about the decimal point, what should I do with it so I can access the other digit ? and what the code should be written for it in the verilog ?

any help :( please