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Altera_Forum
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10 years ago

7segments verilog erorrs

hi, I'm trying to create a verilog file for 2 digit 7 segments, I've created the truth table and derive the equation using kmap but I faced a errors when analyse&synthesis :( the code is : ...
Altera_Forum's avatar
Altera_Forum
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10 years ago

@Galfonz, probably not. It will simply infer a LUT for each segment, which will in the end be likely not bee all that different from in resource usage than code for a ROM would use. The synthesiser is a smart beast.

@Greital, post the error messages - they will appear in the screen at the bottom of the Quartus window. If you click on the red x button it will filter and show only the errors.

https://www.alteraforum.com/forum/attachment.php?attachmentid=11560