Forum Discussion
Contributor22.1 PRO: (*preserve_for_debug*) signals not preserved
Hello,
Alright thanks for the feedback. I've let them know that you expect this fix to apply to all data types.
In the meantime your only workaround is to have the signal connected to an i/o port.
With that, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Regards,
Nurina
P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution.
Contributor1. TESTPRESERVE has no load, I want to keep it for future use without having to change the stp file. If that's not possible, then it's okay if it isn't present.
2. For the other case, it looks like either preserve_for_debug or Quartus is unable to keep my signals, it's unusable.
I see the equivalent net and its driver in the post-synthesis netlist (inside an instance, connected to one of its ports), somehow Quartus doesn't keep the net with the name I specified in my code. (Xilinx's Vivado adds LUT in between to keep both equivalent nets, how about Quartus?)
3. There is no warning containing 13228.
I tried noprune, keep, preserve, but in reality I don't really care about register or wire, the goal is to add an attribute to a structure with (SV's) logic members.
What is the 100%-always-working solution for Quartus 22.1?
Regards,
