--- Quote Start ---
FYI, looks like this is a cross partition boundary issue.
--- Quote End ---
You can test this theory by telling TimeQuest each clock is exclusive/asynchronous
set_clock_groups -exclusive -group clk1 -group clk2
This stops TimeQuest from analyzing signals that cross between these two clock domains, and inherently makes you responsible for ensuring that you include synchronizers where needed.
--- Quote Start ---
If I new the design then I would be inclined to register the signal as docs suggest.
--- Quote End ---
If the example is inconsistent with the documentation, then its likely a poor example, and not worth copying further. You're better off to start with a new design, and then if you get stuck with it, post it and a simulation here, or file a Service Request with Altera.
--- Quote Start ---
Perhaps there is a needle-in-a-haystack fitter or synth setting to resolve.
--- Quote End ---
I have yet to find the "fix this poor example" button :)
Cheers,
Dave
Honored Contributor
