Altera_Forum
Honored Contributor
Honored Contributor10 things that should be enabled in Quartus by default, but are not...
Hello, I've compiled a list of things that have are enabled in Quartus by default, but really shouldn't be for most designs. I've seen issues in the lab with some of these default settings, so hopefully this helps saves you time...
Version 1.1 1. Enable “recovery removal analysis.” This will perform a synchronous analysis on all asynchronous inputs. Enabling this mode ensures that the output of all flops is deterministic and repeatable within each clock period, even after an asynchronous event such as reset. By default this is disabled in TAN and enabled in TimeQuest. 2. Enable “clock latency.” Enabling this mode will perform analysis of delay on the clock network as a result of factors such as a PLL compensation delay. Designs that didn’t enable this and have added multicycle constraints to handle the way TAN interpreted offset vs. latency would have to remove the “corrective” multicycle assignments. By default this is disabled in TAN and enabled in TimeQuest. 3. Enable “Report Combined Fast/Slow Timing” and “Optimize for fast-corner timing.” Enabling this mode will report timing results with both the fast (best case) and slow (worst case) timing models and ensure that the fitter is performing timing driven compilation for both corners. This needs to be enabled to ensure that timing is met on both slow and fast corners of the speed grade that has been selected. This is usually a trade off for compile time. 4. Uncheck “Auto RAM Replacement” in Analysis & Synthesis Settings. This should be disabled because it “allows Quartus to change the functionality of the design” which means synthesis vs. simulation may diverge. Personally, I don’t like inferred RAM – I realize it makes your RTL technology independent, but inferred RAM isn’t always inferred the same, and I would prefer deterministic and repeatable. Inferred RAM works ok for simple dual port, single clock. Use at your discretion and check the compile warnings. 5. Uncheck “Power-Up Don’t Care” in Analysis & Synthesis Settings. Disabling this setting will allow all flops to power-up set to zero instead of unknown. This allows the design behaviour to be more deterministic and repeatable at the expense of optimizing some of the logic surrounding it. 6. Select power play power optimization to “Extra effort.” This will minimize the power of your design – if performance is more important (which it usually is) then leave this to “Normal compilation.” This is highly design dependent. 7. Select minimum IO drive strength required for your application. The default drive strength used by Quartus for all IO standards is set to maximum (for everything pre-65nm) – this is ideal for IO timing, but not necessarily for power and SSN. This is highly design dependent and the maximum setting maybe ideal for your application. 8. Select on-chip termination for the IO standard that you are using. By default these are set to off. For optimal signal integrity it is usually better to use on-chip terminations. This design dependent and will depends on results of signal integrity simulations. Note that receive differential termination (including S2GX receive GXB) and TTL serial termination are not turned on by default. Also note that not all LVDS inputs support on-chip differential termination. 9. Enable “Generate Stratix II GX GXB Reconfig MIF.” This needs to be enabled in order for Quartus to generate the S2GX MIF files – this is only required for dynamic reconfiguration of transceiver ports, but there is really no reason why this should be disabled. 10. Run each of the “design advisors”. This allows you to interactively allow Quartus to go through each design and makes recommendations to the switches set – this is selected in Tools>Advisors and is not normally ran after each compile. There are a number of recommendations for resource, timing, power and incremental compile that can improve your results. You can change most of these in your assignments_defaults.qdf file located in the quartus/bin directory. Thanks for reading!
