Altera_Forum
Honored Contributor
17 years ago/* synthesis syn_noprune syn_preserve = 1 */ not preserving registers with SignalProb
The following lines in one of my verilog files attempt to use attributes to supposedly control synthesis but they are being ignored. At the end of a successful build when I open Tools - SignalProbe Pins - Source & list the available nodes, my registers are not in the list.
reg [6:0] ltssm_trans /* synthesis syn_noprune syn_preserve = 1 */; reg [6:0] ltssm_trans_d1 /* synthesis syn_noprune syn_preserve = 1 */; reg [4:0] compl_trans /* synthesis syn_noprune syn_preserve = 1 */; reg [4:0] compl_trans_d1 /* synthesis syn_noprune syn_preserve = 1 */; reg [NL-1:0] lre1 /* synthesis syn_noprune syn_preserve = 1 */; reg [NL-1:0] lre2 /* synthesis syn_noprune syn_preserve = 1 */; How do I get these attributes to be acted on correctly or am I misunderstanding their use?