Yes, EPCS controller is enough for all flash programming, you can even program the parallel flash using JTAG, the only problem is not speed but programing failures. With a Linux image of the size of 2MB I get a 25% probability of a programming failure and I have to restart the script.
If you are planing to have a processor without a JTAG interface, for higher performance in the final design, than you have to master programming scripts, so you can (in a single script):
1. load the processor with JTAG into the FPGA
2. flash the EPCS with the final hardware and software
3. load the final hardware into the FPGA
4. wait for the software to boot, (no need for power unplagging)
IzI