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Altera_Forum
Honored Contributor
Honored ContributorWorst slack values are Negative for Removal
HI , I am trying to run the NIOSII example of led from the nios2 hardware manual.I could generate the nios 2 system.And also integrate it with the Quartus.But when I compile the system in quart...
Altera_ForumHonored Contributor
Honored ContributorHI ,
I reduced the clk frequency to 25 Mhz.But still I have the same problem. Earlier I had negative values only in altera reserved clk (worst case slack) and altera reserved clk (Design wide TNS) . But now at 25 Mhz I get negative values even in sopc clk. How are these negative values goin to affect the H/W. Can you explain? Its my first demo with Altera and I dont understand it.
