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Altera_Forum's avatar
Altera_Forum
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15 years ago

Worst slack values are Negative for Removal

HI , I am trying to run the NIOSII example of led from the nios2 hardware manual.I could generate the nios 2 system.And also integrate it with the Quartus.But when I compile the system in quart...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Well, you can always reduce the frequency by adding a pll in the clock path.

It might be that just adding a pll already fixes your problem, but if timing already fails at 50MHz, something in your design seems really off.

I usually define every altera_reserved_* as false path, but that might not help you just yet.