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Altera_Forum
Honored Contributor
15 years agowhy o why don't I get an interrupt when SGDMA engine completes a descriptor or chain
background: I am using Quartus 9.1 SP2. On a Arria GX Dev Board (EP1AGX60DF780C6) I am writing a 32bit driver for Windows XP using WDF. I am using Legacy Interrupts and not MSI (...
Altera_Forum
Honored Contributor
15 years agoAre you certain that you have created the linked-list descriptor chain correctly since if there is a problem there then the SGDMA might go into the weeds and never complete. Also in case you didn't notice, the SGDMA slave port places the status register at byte offset 0 and the control register at byte offset 16. So perhaps you were communicating with the control register assuming it was at offset 4 (i.e. maybe the interrupt mask wasn't enabled).