Why does an output only 8-bit wide PIO use/needs 16 memory locations (0x2010-0x201F)?

Have a look at the documentation for the pio core (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_embedded_ip.pdf), chapter 11. Depending on the options, a PIO core uses 4 or 6 32-bit registers. In addition to the pin accesses and direction control, you have a edge capture register and an interrupt mask register.