Forum Discussion
Altera_Forum
Honored Contributor
14 years agoSRAMs have a simple hardware interface that allows access to any location in a single clock cycle.
SDRAMs (all xxxDRAMs are similarish) require the high and low address bits be supplied on separate clocks, and then a burst of adjacent memory locations can be accessed (eg for a cache line fill). The 'high' address page can be kept selected for a subsequent access (to the same page) at a cost of increased power and a slower access to a different page. The effect is that SDRAM has a longer latency and more complex interface logic than SRAM.