Altera_Forum
Honored Contributor
21 years agowhat wrong
I have known the reason for the following problems. how to delete this post?
I modified the output clock frequency of sdrampll to 75M frequency, and compile the quartus 2 projects again. however, when i download binary code to board, the following problem happened. Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Pausing target processor: not responding. Resetting and trying again: OK Reading System ID at address 0x00920828: FAIL ID value does not match: read 0x0ED7A5DB; expected 0x37AEC3EF Timestamp value does not match: image on board is older than expected Read timestamp 14:46:21 2004/04/28; expected 13:26:01 2004/09/21 Leaving target processor paused could anybody help me? thx