Honored ContributorHi everyone!
I enabled weak pull-ups for the input and output pin (cyclone II device). But when I measure the voltage on these pins, on the input pin is 3V and on the output pin is 0V. Shouldn't it be 3.3V for both? I haven't connected these pins to anything yet. I will use them for an external device. Thanks, Nikola
Honored ContributorHi dsl, thanks for joining in to help me. That is the thing that I found strange when I started using the peripheral. When I connected it first to fpga without applying the power to it, I saw it was back-powered from the input lines. Can that cause a damage to the device? If the output of the peripheral is high and the input of the fpga is tri-stated, can that make a problem too?
Honored ContributorI'm only a software engineer !
But at a previous job we had a board with quite a few separate power supplies, this caused quite a few 'back-powering' issues, especially why trying to get the main cpu into 'sleep' mode. We had to drive IO pins low (sometimes an 'active' state') before removing the power from the target. Presumably you don't power the peripheral when the fpga in unpowered.Honored ContributorHi Nikola,
--- Quote Start --- According to the datasheet, the peripheral that I want to connect to my fpga should have all 4 SPI signals pulled high with internal pull-up. But when I power the peripheral up, only SDO (which should be connected to MISO) is high, the other signals are low. I wanted to make sure that pull-ups in the fpga are on initially, so that I do not cause any damage to the devices when I connect them because I don't know if the pull-ups are on initially in my peripheral. --- Quote End --- What is the SPI device (post a link). What is your circuit for connecting the SPI device to the FPGA, eg., do you have a separate power supply, or are you using a power pin on the FPGA kit? You should really simulate your design. That is the only way you can really understand what logic levels are to be expected on the I/Os. Since you did not write the SPI controller, you either need to read the code, or simulate. Simulation is faster, and it will be more useful in the long run. Cheers, DaveHonored ContributorInitially (before configuration), all FPGA pins are driven high (at least near to Vccio when considering leakage currents). When you say, they are not high initially, the pins are either pulled low externally, or you pull them low after configuration, which just means an unsuitable way to drive the pins in your code.
The only cases, where an external pull-up would be required is to override other external loads or for clock inputs, that don't have a pull-up.Honored ContributorHello everyone, I think I finally found a solution to the problem. I used an external power supply to power my peripheral and that apparently caused the problem. Now I am using the power supply from the fpga board. I think I powered my peripheral after powering fpga, but since they were connected, the peripheral was back powered from I/O lines before applying the power to it. Thanks very much! Now I am going to test it properly to see if it works flawlessly.
