Altera_ForumHonored Contributor15 years ago[Warning (12110): Net "_" is missing source] what is it? when i compliling my top verilog design, then with warning [ Warning (12110): Net "_" is missing source, defaulting to GND], what is it? what statement cause it? who can help me? thx!Show More
Altera_ForumHonored Contributor15 years agoHi, Right click on that message > Locate in source design. It is a curious name :-) Regards.
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