Forum Discussion
Altera_Forum
Honored Contributor
15 years ago[Warning (12110): Net "_" is missing source] what is it?
when i compliling my top verilog design, then with warning [ Warning (12110): Net "_" is missing source, defaulting to GND], what is it? what statement cause it? who can help me? thx!
Altera_Forum
Honored Contributor
15 years agoHi,
Right click on that message > Locate in source design. It is a curious name :-) Regards.