Honored Contributor
Honored ContributorFirstly thanks for your very detailed answer I really appreciate :-)
--- Quote Start --- Perhaps another idea is to implement a second Ethernet IP core and use a switch chip with two MII interfaces as a Phy to allow for a single cable. --- Quote End --- I think about another solution but based on the same trick : try to make the TSE MAC 1000 work with uClinux (I've already have a TSE licence) and keep the hardware data path in GBit mode... Consequently, I could use a switch chip with two GMII interfaces pointing to the same PHY !! I made a complete scheme to illustrate my solution : http://img213.imageshack.us/img213/5170/voipuclinuxtsemacphyint.png --- Quote Start --- Do you really need GBit ? --- Quote End --- Yes, I really need GBit because TS bitrate can easily reach 150/200 Mbits... --- Quote Start --- Do you really want to do the (UDP / ) IP stack in "hardware" (how, if I may ask) ? --- Quote End --- Yes, because the VoIP design (AN374) seems to be the perfect balance between implementation time/complexity, required performance/options (GBit, UDP, RTP, FEC CoP#3...) and configuration possibilities !! -> I have one last question concerning the support of TSE MAC 1000 with uClinux : ------------------------------------------------------------------------------------------------------ The Nios Wiki (uClinux) page about Ethernet suggests two solutions : [*] Altera Tripple Speed Ethernet support (EXPERIMENTAL) exOr, [*]Altera Triple Speed Ethernet MAC support(SLS) [*]Drivers for Marvell PHYs Which choice is the most suitable for an GMII interface with the PHY in Gigabit mode ?? Furthermore, does anyone succeed to use uClinux in Gigabit mode with TSE MAC ?? ------------------------------------------------------------------------------------------------------ Thanks for your help !! Papy
