Vhdl question

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I come on this pice of code:

SIGNAL clockticks200k: INTEGER RANGE 0 TO max200k;

What dose Range stand for?

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The word range is used here to constrain the signal clockticks200k to the range 0<=clockticks200k<=max200k. If the value that clockticks200k ever evaluates to something outside of this range, a simulator will assert an error telling you so.

If the signal were declared:

SIGNAL clockticks200k: INTEGER;

no such checks would be performed.

Range constraining is a good practice if you know the bounds of the values. It provides a free assertion for you in your VHDL code without having to actually code an assertion.