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Honored Contributor

11 years ago

Verification failed - SDRAM module

Hey<br><br>I'm struggling to overcome a verification errors when attempting to download my .elf onto my Cyclone 4 E. I can get the "hello world" example to download when only using onchip mem but can...

Altera_Forum

Honored Contributor

10 years ago

Is this DE0-Nano? I have seen timing issues reported where Nios unable to access the SDRAM due to clock skew issue. It is recommended to generate a 3ns clock that leads Nios clock to the SDRAM controller.

Reference: ftp://ftp.altera.com/up/pub/altera_material/11.1/tutorials/verilog/de0-nano/using_the_sdram.pdf, section 7.

Hope this helps.

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Verification failed - SDRAM module

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